Hardware Description Language
Owner: Dr Uriel Martinez Hernandez
Number of students: 2
Formative Deadline: Friday W5
Learning Outcomes
Programming in Hardware Description Language (HDL) prepares engineers to design, simulate, implement and verify digital systems in software for their deployment in hardware. In year 2 you will design and implement more complex digital systems designs than year 1 including counters, clocks, electronic locks, video controller and a microprocessor.
Knowledge Requirements
For Knowledge, you should complete the “HDL” Moodle quiz available on this unit’s Moodle page.
Application Requirements
To claim this skill your page will showcase the aspects listed below:
Requirement: to have knowledge skill
1 - A brief explanation (20-50 words) of the tasks performed by the digital systems. 2- A video (1-minute video maximum) that demonstrates the correct functionality of your digital system. The video must show the input signals (e.g., switches, push buttons of your FPGA) and the resulting output signal (e.g., on the LEDs and 7-segment displays of your FPGA).
Synthesis Requirements
To claim this skill your page will showcase the aspects listed below:
Requirement: to have application skill
1 - A brief explanation (20-50 words) of the digital systems used in the general application selected for the synthesis skill. 2- A video (1-minute video maximum) that demonstrates the correct functionality of your digital system in the general application selected for the synthesis skill. The video must show the input signals (e.g., switches, push buttons of your FPGA) and the resulting output signal (e.g., on the LEDs and 7-segment displays of your FPGA).
Knowledge Opportunities
Lab W2
Application Opportunities
Lab until W4